Lecturer Profile |
KrishnenduChakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now the William H. Younger Distinguished Professor and Department Chair of Electrical and Computer Engineering, and Professor of Computer Science, at Duke University. Prof. Chakrabarty is a recipient of the National Science Foundation CAREER award, the Office of Naval Research Young Investigator award, the Humboldt Research Award from the Alexander von Humboldt Foundation, Germany, the IEEE Transactions on CAD Donald O. Pederson Best Paper Award (2015), the ACM Transactions on Design Automation of Electronic Systems Best Paper Award (2017), and over a dozen best paper awards at major conferences. He is also a recipient of the IEEE Computer Society Technical Achievement Award (2015), the IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement Award (2017), and the Distinguished Alumnus Award from the Indian Institute of Technology, Kharagpur (2014). He is a Research Ambassador of the University of Bremen (Germany) and Hans Fischer Senior Fellow at the Institute for Advanced Study, Technical University of Munich, Germany. Prof. Chakrabarty served as the Editor-in-Chief of IEEE Design & Test of Computers during 2010-2012 and ACM Journal on Emerging Technologies in Computing Systems during 2010-2015. Currently he serves as the Editor-in-Chief of IEEE Transactions on VLSI Systems. He is also an Associate Editor of IEEE Transactions on Biomedical Circuits and Systems, IEEE Transactions on Multiscale Computing Systems, and ACM Transactions on Design Automation of Electronic Systems. |
Lecture Abstract |
The performance of today’s computing infrastructure is limited by the energy consumption involved in processing, storing, and moving data. In addition, the exponential increase in the volume of data must behandled by our computational infrastructure is driven in large part by machine-learning applications such as deep neural networks. Conventional computing architectures are unable to deal effectively or efficiently with this data volume or with the requirement to transform data into actionable information. Moreover, a major showstopper towards energy efficient computing is the high error rate associated with traditional techniques. There is a pressing need to incorporate fault tolerance in emerging computing architectures and circuit designs. This talk will first introduce the audience to the exciting and emerging area of brain-inspired neuromorphic computing systems for machine-learning hardware. First, the presenter will describe RRAM-based crossbars and their role in neuromorphic computing systems. Following this, the need for testing and fault tolerance will be motivated in light of imperfect fabrication technologies, as well as technology limitations such as write endurance in RRAM cells. The speaker will present a physics-based classification and analysis of memristor fault origins. These faults origins will be systematically attributed to process variations and manufacturing defects. This study of memristor fault originsand the resulting conclusions provides valuable feedback forthe fabrication and the design of memristor-based circuitsandsystems.Fault models and test solutions will be presented. Subsequently, techniques for online testing and fault-tolerant training will be described.Finally, time permitting, the speaker will describe an efficient fault tolerance method inspired by algorithm-based fault tolerance (ABFT), and referred to as extended-ABFT (X-ABFT), forfault detection and error correction. |
